Lumped RF Model of MOSFET Gate Resistance for GHz+ Frequencies Enhancement of Compact BSIM MOSFET Model

CHARLES, HOGGATT and JAN, DIVIN and JOSEF, DOBES and STANISLAV, BANAS and VACLAV, PANKO (2015) Lumped RF Model of MOSFET Gate Resistance for GHz+ Frequencies Enhancement of Compact BSIM MOSFET Model. In: Third International Conference on Advances in Information Processing and Communication Technology - IPCT 2015, 10-11 December, 2015, Rome, Italy.

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Abstract

This paper presents a lumped RF model of high voltage FET applicable for the frequency up to GHz range. Unlike the compact MOSFET model, the proposed solution contains not only parasitic capacitances and resistances but also parasitic inductance. The signal delay caused by relatively large device area including the parasitic resonance modeled by distributed RLC network is considered. The model is applicable in commercial SPICE simulators, e.g. Eldo, Spectre or HSpice.

Item Type: Conference or Workshop Item (Paper)
Uncontrolled Keywords: SPICE model, MOSFET, RF, parasitic, RLC network, high frequency, GHz, simulation
Depositing User: Mr. John Steve
Date Deposited: 04 Apr 2019 12:00
Last Modified: 04 Apr 2019 12:00
URI: http://publications.theired.org/id/eprint/1163

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