A CMOS Envelope Tracking Power Amplifier with Hybrid Bias Modulator

HEARYUN, JUNG and JUNGHYUN, HAM and YOUNGOO, YANG (2014) A CMOS Envelope Tracking Power Amplifier with Hybrid Bias Modulator. In: International Conference on Future Trends In Information and Communication Engineering - FTICE 2014, 04 - 05 May, 2014, Bangkok.

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Abstract

This paper presents an envelope tracking power amplifier (ET PA) using a hybrid bias modulator for mobile terminal applications. The hybrid bias modulator consists of a linear amplifier and a switching amplifier. The CMOS PA has a two-stage single-ended structure. For 1.75-GHz long-term evolution signal with 5-MHz bandwidth, 7.3-dB peak-to-average power ratio (PAPR), and 16-quadrature amplitude modulation, the CMOS ET PA delivers a power-added efficiency (PAE) of 30.5 %at an average output power of 21dBm. The ET PA also delivers a PAE of 24.2 % at average output power of 17 dBmwhich is 6.9 % higher than that of the stand-alone PA.

Item Type: Conference or Workshop Item (Paper)
Uncontrolled Keywords: hybrid bias modulator, wireless communication technology,CMOS power amplifier, envelope tracking power amplifier, LTE mobile application
Depositing User: Mr. John Steve
Date Deposited: 13 May 2019 12:24
Last Modified: 13 May 2019 12:24
URI: http://publications.theired.org/id/eprint/2328

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