Design and Implementation of MIL-STD-1553B RT Subsystem

CHANG-HOON, CHO and DONG-SEONG, KIM and JAE-MIN, LEE and SEUNG-HAN, KIM (2017) Design and Implementation of MIL-STD-1553B RT Subsystem. In: Sixth International Conference on Advances in Computing, Control and Networking - ACCN 2017, 25-26 February 2017, Bangkok, Thailand.

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Abstract

In this paper, the MIL-STD-1553B RT(Remote Terminal) subsystem based on FPGA and IP Core was implemented. Proposed system integrate CPU, ASIC, and peripheral circuits of the MIL-STD-1553B system on one chip. Through this, scalability of the MIL-STD-1553B system can be enhanced. For verifying proposed FPGA based the MIL-STD-1553B system, simulation environment was constructed with the MIL-STD-1553B tester and test software for identifying electrical characteristics and data communication functions. Simulation results show that proposed system can be interfaced with the MIL-STD-1553B data bus and advantageous in manufacturing cost reduction because of its scalability.

Item Type: Conference or Workshop Item (Paper)
Uncontrolled Keywords: MIL-STD-1553B, FPGA, IP Core, Real-time System.
Depositing User: Mr. John Steve
Date Deposited: 16 Mar 2019 11:59
Last Modified: 16 Mar 2019 11:59
URI: http://publications.theired.org/id/eprint/552

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